Join our exceptional and passionate team to build the next generation infrastructure for the AI era！ 

We offer competitive salary, stock options, health insurance, and 401K.

Send your resume to jobs@dinoplus.ai to apply.

Principal ASIC Architect

 Responsibilities

  • Participate: market technical analysis, marketing spec definition and reviewing
  • Develop and execute: architecture for performance/speed/size/power goals, definition, coding in C/C++/SystemC/RTL in verilog/SV
  • Support: marketing, customer communication

 Qualifications

  • BS/MS in EE/CS with 8+ years relevant experience
  • Experience:  chip architecture exploring, modeling, design for high speed data center or similar chips
  • Hands-on experience: C/C++/SystemC, Verilog/SV, Synthesis, Formal Verification, Static Timing Analysis
  • Plus: AI/Deep learning, processor design, PCIe/HBM/DDR, FPGA emulation

 Locations
  Fremont, CA, USA

Senior/Principal ASIC/FPGA Design Engineer

 Responsibilities

  • Participate: chip architecture definition and reviewing, verification test plan, testbench
  • Develop and execute: micro-architecture specification, RTL in Verilog/SV, performance/speed/power goals.
  • Bringing up the chip in lab, composing bring-up scripts

 Qualifications

  • BS/MS in EE/CS with 5+ years relevant experience
  • Experience: Logic Design on high speed data center chips, Integration of acquired IP blocks
  • Hands-on experience: Verilog, Synthesis, Formal Verification, Static Timing Analysis
  • Plus: processor design, AI/Deep learning, PCIe/HBM/DDR, FPGA emulation

  Locations

   Fremont, CA, USA / Nanjing, China


Senior/Principal ASIC Verification Engineer

 Responsibilities

  • Participate:  architecture definition and modeling, micro-architecture review
  • Develop: verification environment, chip and block level test plan, Post-silicon bring-up scripts/plan.
  • Collaborate: with design, software and hardware teams to ensure a successful product delivery.
 Qualification
  • Experience:  high-performance data center or similar ASIC verification
  • Knowledge:  ASIC design and verification methodologies and flows
  • Hands-on experience: System Verilog, C++, Perl/Python,  UVM
  • Plus: processor design, AI/Deep learning, PCIe/HBM/DDR, FPGA emulation

 Locations

  Fremont, CA, USA/ Nanjing,China


Deep Learning Algorithm Engineer

 Responsibilities

  • Research and implement state of the art neural network inference and training algorithms (pruning, quantization, etc.) 
  • Research and apply deep learning and AI algorithms in but not limited to the following areas: computer vision, speech recognition, NLP, object detection and localization,  autonomous driving, recommendation systems, multimodal learning, reinforcement learning, and so on. 

 Qualifications

  • Master’s or PhD in computer science, electrical engineering, applied math, or related fields
  • 2+ years of experience in deep learning model development
  • Proficiency in Python, C++. Hands on experience with at least one of DL frameworks (e.g. TensorFlow, Caffe, Caff2, MXNet, etc.)
  • Top academic conference and journal papers are big plus
 Locations
  Fremont, CA, USA / Nanjing, China

Compiler Engineer

 Responsibilities

Work on the compiler for our in-house AI processors. The compiler takes the models exported from machine learning frameworks and generates code with our AI processor instructions  

 Qualifications

  • BS or MS in computer science, or related fields
  • 3+ years of compiler experience; hands on experience in code generation and optimization
  • Familiar with neural network architecture such as CNN and LSTM 

 Locations
  Fremont, CA, USA / Nanjing, China

System Software Engineer

 Responsibilities

  Develop drivers and implement u-code for our in-house deep learning processors

 Qualifications

  • BS or MS in computer science, electrical engineering or related fields
  • Hands on experience with Linux kernel driver development; Proficient in C/C++ and bash script
  • Familiar with PCIE, DMA, microprocessor architecture and ASIC bring-up
  • Understanding of deep learning algorithms such as CNN and LSTM
  • 5+ years of related industry experience
  Locations
   Fremont, CA, USA / Nanjing, China

Automotive Chip Architect and Designer

 Responsibilities

 Define and optimize architecture and design for functional safety

 Qualifications

  • 10+ years ASIC architect/design, verification, or related work experience in automotive industry.
  • Full-cycle experience in designing/developing/certificating for functional safety.
  • Experience in developing tools and methodologies, working with Design and Design verification teams using methods such as FMEA, FMEDA, and FTA.
  • Strong programming capabilities in C/C++, Perl, python, Tcl, and Java. Strong Object Oriented programming skills.
  • Bachelors of Science degree in Computer Engineering, Computer Science, or Electrical Engineering.
  Locations
   Fremont, CA, USA / Nanjing, China

Director/Manager of Marketing & Business Development

 Responsibilities

  • Identify market opportunities in Data Center and Autonomous driving. And provide visual technology/solutions for markets.
  • Define the business cases, go to market strategies, key success factors and represent these to the executive team for funding.
  • Execute these ideas. Monitor, adapt, and accelerate execution to produce meaningful results for the company in these new endeavors.

 Qualifications

  • 5+ years of experience in Data Center or telecom BD/marketing.
  • Excellent written and verbal communication skills.
  • Partnership development and growth skills.
  Locations
  Fremont, CA, USA / Nanjing, China